The present invention is related to a method of improving the resistance (Rs) uniformity and repeatability for low energy ion implantation, and particularly to a method of improving the resistance (Rs) uniformity and repeatability for low energy ion implantation applied in a semiconductor-manufacturing process.
With progress of the technology, it""s well known that the semiconductor industry has stepped from the anterior sub-micron era into the present sub-half-micron era. Besides, there is a tendency to further miniaturize the size of semiconductor devices as well. To achieve the tendency of scaling-down semiconductor devices, it""s important to improve the manufacturing process of the semiconductor devices. For instance, the cooperation of the low energy ion implantation with the spike annealing rapid thermal process (RTP) is developed for meeting such a requirement of manufacturing further miniaturized semiconductor devices in the future.
More specifically, the low energy ion implantation is directed to implant ions with +3 or +5 valence electrons into a silicon layer. Thereafter, the damaged silicon crystal structure of the silicon layer resulted from low energy ion implantation is then recovered by the spike annealing rapid thermal process (RTP). However, resistance (Rs) uniformity and repeatability of such a cooperation are very bad conventionally. Besides, the longer the time of the rapid thermal process is, the more serious the problem of the implanted ions which diffuse outward is.
As mentioned above, according to the prior art, there are some drawbacks existing as follows.
1. There are the problems of bad resistance (Rs) uniformity and repeatability existed in such a cooperation of the low energy ion implantation applied in semiconductor diffusion process with the spike annealing rapid thermal process (RTP).
2. Because of gradual decrease of the resistance (Rs) measurement, the yield of the semiconductor devices is lowered.
An object of the present invention is to provide a method of cooperating of the low energy ion implantation applied in semiconductor diffusion process with the spike annealing rapid thermal process (RTP).
Another object of the present invention is to provide a method of improving the resistance uniformity and repeatability for the low energy ion implantation applied in semiconductor diffusion process.
A further object of the present invention is to provide a method of improving the yield of the semiconductor devices for the low energy ion implantation applied in semiconductor diffusion process.
According to the present invention, the method of improving a resistance uniformity and repeatability of a wafer having a silicon layer thereon after said silicon layer is treated with a low energy ion implantation process, comprising steps of cleaning and oxidizing a surface portion of said silicon layer; and annealing said silicon layer for recovering a damaged silicon crystal structure of said silicon layer resulted from said low energy ion implantation.
Preferably, the low energy ion implantation process is executed at a low energy less than 10 Kev, and the ion is an arsenic ion,
The step of cleaning and oxidizing said surface portion of said silicon layer includes the steps of cleaning said surface portion of said silicon layer to remove a native oxide layer from said surface portion of said silicon layer by using a dilute hydrofluoric acid (HF) solution; cleaning said surface portion of said silicon layer to remove a contaminant from said surface portion of said silicon layer by using a dilute hydrochloric acid (HCl) solution; and immersing said wafer into an ozone solution to form a chemical oxide layer on said silicon layer.
The silicon layer is annealed by a spike annealing rapid thermal process (RTP).
The spike annealing rapid thermal process (RTP) is executed by rapidly heating said silicon layer to a specific temperature and then instantaneously lowering said specific temperature to a room temperature.
The specific temperature is 1100xc2x0 C.
The present invention may best be understood through the following description with reference to the accompanying drawings, in which: